JEDEC Committee:
JC-45 DRAM Modules

The scope of JC-45 is to develop standards for DRAM modules, cards, and socket interfaces. These standards are to address architectural, electrical, test, and SPD issues relating to memory design and manufacturing for commercial applications.

Memory module is defined as a single or multiple PCBs that predominantly include multiple memory, logic, and passive devices in a planar or 3D layout for use with sockets.


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Recent Documents

Annex C, R/C C, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification MODULE4.20.28.C Jun 2017
Annex B, R/C B, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification MODULE4.20.28.B May 2017
Annex A, R/C A, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.A May 2017
Annex B, R/C B, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Unbuffered DIMM Design Specification MODULE4.20.26.B May 2017
Annex E, R/C E, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.E May 2017
Annex C, R/C C, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification MODULE4.20.25.C May 2017
ADDENDUM NO. 1 to JESD209-4, LOW POWER DOUBLE DATA RATE 4X (LPDDR4X) JESD209-4-1 Jan 2017
Annex D, R/C D, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Load Reduced DIMM Design Specification MODULE4.20.27.D Dec 2016
Annex A, R/C A, in 288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design Specification MODULE4.20.28.A Nov 2016
288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/ PC4-3200 DDR4 SDRAM Non-Volatile NAND-Flash DIMM Design Specification MODULE4.20.29 Oct 2016