Global Standards for the Microelectronics Industry
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Displaying 1 - 4 of 4 documents.
| Title | Document # | Date |
|---|---|---|
MCP Overview |
MCP3.12.0 | Jun 2006 |
Release No. 16 Committee(s): JC-63 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Silicon Pad Sequence (x16/x32 LPDRAM, x16 PSRAM, x16 NAND). Item JC-63-029 |
MCP3.12.3 | Nov 2006 |
Release No. 16A Committee(s): JC-63 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Package-on-Package (PoP) and Internal Stacked Module (ISM) |
MCP3.12.2 | Jan 2012 |
Release No. 22. Committee(s): JC-63 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Multichip Packages (MCP) and Discrete eMMC, e2MMC, and UFSRelease Number: 25 |
MCP3.12.1 | Jan 2016 |
Item 133.03 This Section provides electrical interface items related to Multi-Chip Packages (MCP) and Stacked-Chip Scale Packages (SCSP) of mixed memory technologies including Flash (NOR and NAND), SRAM, PSRAM, LPDRAM, USF. etc. These items include die-on-die stacking within a single encapsulated package, package-on-package or module-in-package technologies, etc. The Section also contains Silicon Pad Sequence information for the various memory technologies to aid in the design and electrical optimization of the memory sub-system or complete memory stacked solution. Committee(s): JC-64.2 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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